HIDRIVE=LOWDRIVE, INV=INPUT_NOT_INVERTED_, FUNC=P5_2, HS=ENABLED
I/O configuration register for pin P5[2]
| FUNC | Selects pin function for pin P5[2] 0 (P5_2): General purpose digital input/output pin. 3 (T3_MAT2): Match output for Timer 3, channel 2. 5 (I2C0_SDA): I2C0 data input/output (this pin uses a specialized I2C pad that supports I2C Fast Mode Plus). |
| RESERVED | Reserved. |
| INV | Invert input 0 (INPUT_NOT_INVERTED_): Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0). 1 (INPUT_INVERTED_HIGH): Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1). |
| RESERVED | Reserved. |
| HS | Configures I2C features for standard mode, fast mode, and Fast Mode Plus operation. 0 (ENABLED): I2C 50ns glitch filter and slew rate control enabled. 1 (DISABLED): I2C 50ns glitch filter and slew rate control disabled. |
| HIDRIVE | Controls sink current capability of the pin, only for P5[2] and P5[3]. 0 (LOWDRIVE): Output drive sink is 4 mA. This is sufficient for standard and fast mode I2C. 1 (HIGHDRIVE): Output drive sink is 20 mA. This is needed for Fast Mode Plus I2C. Refer to the appropriate specific device data sheet for details. |
| RESERVED | Reserved. |